A typical computer system includes at least a microprocessor and some form of memory. The microprocessor has, among other components, arithmetic, logic, and control circuitry that interpret and execute instructions necessary for the operation and use of the computer system. FIG. 1 shows a typical computer system 10 having a microprocessor 12, memory 14, integrated circuits 16 that have various functionalities, and communication paths 18, i.e., buses and signals, that are necessary for the transfer of data among the aforementioned components of the computer system 10.
A microprocessor, such as the one shown in FIG. 1, typically includes an integer unit and a floating point-unit, each with its own registers. This organization allows for implementations with concurrency between integer and floating-point instruction execution. Typically, the integer unit contains general-purpose registers and controls the overall operation of the microprocessor. The integer unit executes the integer arithmetic instructions and computes memory addresses for loads and stores. The integer unit also maintains the program counter and controls instruction execution for the floating-point unit.
In an exemplary implementation of an integer unit, the integer unit may contain 64 to 528 general-purpose 64-bit r registers (an r register is an integer register and is also known in the art as a “general-purpose register” or “working register”). They are partitioned into 8 global registers, 8 alternate global registers, plus an implementation-dependent number of 16-register sets. As shown in Table 1, a “register window” consists of the current 8 in registers, 8 local registers, and 8 out registers.
TABLE 1Window AddressingWindowed Registerr RegisterAddressAddressin[0]–in[7]r[24]–r[31]local[0]–local[7]r[16]–r[23]out[0]–out[7] r[8]–r[15]global[0]–global[7]r[0]–r[7]Registers r[0]–r[7] refer to a set of eight registers called the global registers, g0–g7. At any given time, one of four sets of eight registers is enabled and can be accessed as the global registers. Which set of global registers is currently enabled is selected by an alternate global (AG, MG, GG, or IG) field in a processor stage register (PSTATE). Global register zero, g0, typically reads a zero, i.e., writes to it have no program-visible effect.
At any time, an instruction may access the 8 global registers and a 24-register window into the r registers. A register window comprises the 8 in and 8 local registers of a particular register set together with the 8 in registers of an adjacent register set, which are addressable from the current window as out registers.
As an example of register windowing, FIG. 2 shows a 5 register window architecture 20. As those skilled in the art will understand, although FIG. 2 shows a 5 register window scheme, the number of windows or register sets is implementation-dependent. The total number of r registers in a given implementation is 8 (for the global registers), plus 8 (for the alternate global registers), plus the number of sets multiplied by 16 registers/set.
A current window into the r registers is given by the current window pointer (CWP) register. The CWP is decremented by a RESTORE/RETURN instruction and is incremented by a SAVE/STORE instruction. Window overflow is detected via a CANSAVE register and window underflow is detected via a CANRESTORE register. More specifically, the CANSAVE register contains the number of register windows following CWP that are not in use and are available to be allocated by a SAVE instruction. The CANRESTORE register contains the number of register windows preceding CWP that are in use by the current program and can be restored via the RESTORE instruction.
Additionally, state registers OTHERWIN and CLEANWIN may be used in some register window schemes. The OTHERWIN register contains the count of register windows that will be spilled/filled using a particular set of trap vectors. When all of the register windows fill and another register window is saved, a register window overflow, or “spill” occurs, in which case some number of registers are saved to the program stack. Alternatively, when restoring a register window that is not already in a register window, a register window underflow, or “fill” occurs, in which case some number of register windows are restored from the program stack. In some implementations, the OTHERWIN register may be used to split the register windows among different address spaces and handle spill/fill traps using separate spill/fill vectors. The CLEANWIN register counts the number of registers that are “clean” with respect to the current program. That is, register windows that contain only zeroes, valid addresses, or valid data from that program are counted. Registers in these windows need not be cleaned before they are used. The count includes the register windows that can be restored (the value in the CANRESTORE register) and the register windows following CWP that can be used without cleaning.
As discussed above, each window shares its ins with one adjacent window and its outs with another. The outs of the CWP−1 window are addressable as the ins of the current window, and the outs in the current window are the ins of the CWP+1 window. The locals are unique to each window. When one function, or subroutine, calls another, the callee may choose to execute a SAVE instruction. This instruction increments CWP, shifting the register window upward. The caller's out registers then become the callee's in registers, and the callee gets a new set of local and out registers for its own use. Only the CWP changes because the registers and return address do not need to be stored on a stack. The CALL instruction automatically saves its own address in, for example, out register 7, which becomes in register 7 if CWP is incremented. Therefore, the callee may access the return address whether or not it has decremented CWP.
An r register with address o, where 8≦o≦15, refers to exactly the same register as address (o+16) does after the CWP is incremented by 1. Likewise, a register with address I, where 24≦o≦31, refers to exactly the same register as address (o−16) does after the CWP is decremented by 1. For a high level view of register dependency in a register window implementation, refer to FIG. 3, which shows a circular stack 30 of windowed r registers for an implementation using an 8 register window scheme.